About us

The APECS (Advanced Packaging and Integration for Electronic Components and Systems) pilot line is one of the pilot lines to be established under the EU Chips Act. APECS will become the foundation for Europe's competitive position in advanced heterogeneous system integration and advanced packaging. It plays a vital role in enhancing Europe's strategic autonomy by reducing dependence on foreign suppliers and strengthening Europe's capabilities in critical technology areas. This is essential for the resilience and competitive advantage in areas such as telecommunications, high-performance computing (HPC), Artificial Intelligence/Machine Learning (AI/ML), sensor systems, medical and scientific instrumentation as well as industrial manufacturing in Europe. By enabling large industry players, SMEs, and start-ups to gain easier access to cutting-edge technology, the APECS pilot line aims to build a strong foundation for a resilient and robust European semiconductor supply chain. All developments will be carried out in accordance with the requirements of the European Green Deal.

The goals of the EU Chips Act will be achieved through three pillars of action: the “Chips for Europe Initiative”, security of supply and resilience, and monitoring and crisis response. The APECS pilot line is part of the pillar one “Chips for Europe Initiative”, which aims to support large-scale technological capacity building and Innovation throughout the Union and enable the development and deployment of cutting-edge, next generation semiconductor and quantum technologies. Setting up pilot lines for semiconductor chip production in Europe is therefore an important stipulation of the EU Chips Act. These pilot lines are specialized facilities that test newly developed technologies and manufacturing processes in the chip production segment prior to their commercial implementation on a large scale. 

The EU Chips Act is a major step towards bolstering the microelectronics industry in Europe. In a digitalized world that relies on chip production, the aim of the EU Chips Act becomes crucial, as it seeks to close the gap between the EU's advanced research, its innovation capabilities and its sustainable industrial exploitation. As a result of targeted funding measures, the EU will be able both to enhance its own competitiveness and to assume a leading role in the global semiconductor market. Ultimately, the Chips Act represents an effort to reinforce Europe's technological resilience, its competitiveness and resilience, and to contribute to the digital and green transition. 

Together with the other pilot lines proposed within the EU Chips Act, APECS will become a crucial part of the envisioned pan-European pilot line facility. To this end, we intend, among other things, to build on and strengthen our existing multi- and bilateral cooperation with European stakeholders.

APECS features the world's first comprehensive integration platform for 2.5D and 3D heterogeneous packaging, encompassing a broad range of cutting-edge technologies such as CMOS, III-V, for RF, photonics and sensors. The platform provides end-to-end design and pilot production capabilities, enabling the validation and integration of technologies that go beyond current advanced packaging standards. APECS supports an unprecedented range of component technologies and materials, combined with world-class system design, interconnection and assembly techniques, as well as characterization, testing, reliability, and safety assessment to ensure manufacturability of the validated solutions.

Two of the planned pilot lines within the framework of the EU Chips Act have already been announced. The first of them is FAMES, planned by CEA-leti, which aims to develop five new technologies based on FD-SOI, embedded non-volatile memories, high-frequency components, 3D integration options and small inductors for the development of DC-DC converters for power management ICs. The second pilot line already announced is NanoIC, established by imec and focusing on advanced sub 2n leading edge-system-on-chip (SoC) technology. In both pilot lines, Fraunhofer-Gesellschaft is one of the partners. 

The APECS pilot line focuses on bridging application-oriented research with innovative development in heterogeneous integration, specifically through the use of emerging chiplet technologies. By pushing beyond conventional System-in-Package (SiP) methods, APECS aims to deliver robust and trustworthy heterogeneous systems, significantly boosting the innovation capacity of the European semiconductor industry.

The pilot line plays a key role in supporting European microelectronics by standardizing integration technologies and unlocking new functionalities within the system-technology co-optimization (STCO) approach. This will enable European companies to develop advanced products with high yields, even in medium quantities, at competitive costs. By providing a wide range of technologies on a single platform, APECS is positioned to become Europe’s leading hub for advanced packaging and heterogeneous integration. 

Customers across a wide range of industries (e.g. automotive/mobility, manufacturing, medical/medical devices and applications, information and communication, energy and more) can experience the convenience of a single point of contact through the APECS pilot line. From large enterprises to SMEs and tech start-ups, all can take advantage of the one-stop shop, simplifying the process and ensuring efficient collaboration at every stage.

Furthermore, APECS is deeply committed to sustainable innovation, playing a pivotal role in Europe's transition towards a carbon-neutral and circular economy through its focus on eco-design and green manufacturing initiatives.

Striving to become the leading European platform for advanced packaging and heterogeneous integration innovation, APECS envisions a future where the European semiconductor industry is not only internationally competitive, but also a driving force behind the next generation of integrated systems.

By bringing together diverse technologies, fostering multi-level collaboration, and providing seamless access to cutting-edge solutions, APECS aims to build a resilient and thriving community of interest that enables European companies, from Startups through SMEs to industry leaders, to play a key role in the global semiconductor market. Furthermore, as a comprehensive platform, APECS integrates an end-to-end design and pilot production capabilities, enabling innovations to progress from cutting-edge research to practical, scalable manufacturing solutions. 

The APECS consortium brings together the technological competences, infrastructure, and know-how of ten partners from eight European countries: Germany (Fraunhofer-Gesellschaft as coordinator, FBH, IHP), France (CEA-Leti), Belgium (imec), Finland (VTT), Austria (TU Graz), Greece (FORTH), Spain (IMB-CNM, CSIC) and Portugal (INL).

APECS is coordinated by the Fraunhofer-Gesellschaft and implemented by the Research Fab Microelectronics Germany (FMD). 

• Fraunhofer AISEC
• Fraunhofer EMFT
• Fraunhofer ENAS
• Fraunhofer FHR
• Fraunhofer HHI
• Fraunhofer IAF
• Fraunhofer IIS
• Fraunhofer IMS
• Fraunhofer IPMS
• Fraunhofer IMWS
• Fraunhofer ISIT
• Fraunhofer IZM
• Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik
  
• IHP GmbH - Leibniz Institute for High Performance Microelectronics

A key asset of the APECS pilot line is its decentralized structure, which combines specialized technological expertise from partners across Germany and beyond. This singular cross-location setup aligns perfectly with industrial needs for next-generation heterogeneous integration systems, serving as a comprehensive fusion of connected high-tech solutions rather than one distinct technology. A manufacturing execution system (MES) will guarantee the quality management between the pilot lines at the level of production control. Based in Berlin, the APECS one-stop-shop provides clients with tailored solutions for heterogeneous integration and chiplet technology. Here, the customer works with APECS to determine the best path to the final product. Once a concept is in place, the extensive APECS network of partners will dive deep with the customer and build the final prototypes and products.

The Research Fab Microelectronics Germany (FMD, for its acronym in German) is a joint research cooperation in the field of micro and nanoelectronics. The FMD brings together institutes from two German research organizations, the Fraunhofer-Gesellschaft and the Leibniz Association. Around 4900 employees across all cooperating institutes contribute with their expertise to the FMD. Based in Berlin, the FMD business office acts as a point of contact for potential stakeholders and customers in Germany and Europe on all matters concerning micro and nanoelectronics research and development. Within APECS, FMD acts as the implementing agency for the pilot line.

Besides the 13 institutes cooperating within the FMD (Fraunhofer ENAS, EMFT, FHR, HHI, IAF, IMS, IIS, IISB, IPMS, ISIT, IZM, Leibniz FBH and IHP), the institutes Fraunhofer AISEC and IMWS also contribute with their know-how and are involved in the implementation of the APECS pilot line. Due to their status as guest members of the Fraunhofer Microelectronics Group, the latter two institutes are closely related to the FMD.

Within APECS, the institutes collaborating within the FMD are working closely with other European partners, making a significant contribution to the European Union´s goals of increasing technological sovereignty, strengthening cross-border collaboration and enhancing its global competitiveness in the semiconductor technologies.

Today, the semiconductor device industry is fundamental for all modern economies. Semiconductor research and development is at the core of current technological (r)evolutions, ranging from artificial intelligence and high-performance computing, modern defense systems to robotics, power electronics, wireless communication, e-health care, quantum technologies, and more. Such future electronic systems will require more and more functions that cannot be provided by a single chip, even if advanced system-on-chip (SoC) concepts are used. Heterogeneous integration will be the next step and will go beyond current system-in-package (SiP) approaches. This concept of true heterogeneous integration is extremely important for next-generation devices based on future CMOS nodes, SiGe, SiC, III/Vs such as GaAs or GaN and all different types of microelectromechanical systems (MEMS).

For conventional approaches, the amount of data to be stored is too big, the data transfer rates are too low, the available computational power is limiting, and the energy consumption, as well as the heat production of general-purpose computer processing units (CPUs) are too high. In addition, the increasingly higher costs for further node miniaturization in the IC manufacturing process will also promote the interconnection of so called chiplets. This means that intellectual property (IP) blocks made in different technology nodes will be combined on an active or passive interposer to reduce cost by increasing the production yield (smaller chips) and reuse across applications. This will also touch upon environmental properties of electronics in terms of resource efficiency, critical raw materials, modularity and re-usability of design blocks.

APECS is co-funded by the Chips Joint Undertaking and national funding authorities of Austria, Belgium, Finland, France, Germany, Greece, Portugal, Spain, through the Chips for Europe Initiative. The overall funding for APECS amounts to € 730 million over 4.5 years.

Thanks to substantial funding from the German Federal Ministry of Education and Research (BMBF) and the federal states of Saxony, Berlin, Bavaria, Schleswig-Holstein, Baden-Württemberg, North Rhine-Westphalia, Brandenburg, and Saxony-Anhalt, it will be possible to further expand the R&D infrastructure in the coming years within the framework of the APECS pilot line.

The pilot line builds on existing FMD projects, leveraging previously established work processes. These processes were successfully coordinated during the implementation of a unified Manufacturing Execution System (MES) in the FMD clean rooms. This effort involved creating interfaces to securely transfer data between the clean rooms, while considering FMD’s decentralized structure to ensure precise control over the exchangeable data.

The PREVAIL project, launched on 1 December 2022, and led by partners CEA-Leti (coordinator), Fraunhofer, imec and VTT, also includes investments in advanced packaging, focusing on initial process solutions for neuromorphic computing. These solutions will be further developed and upgraded within the APECS pilot line through additional equipment to meet the more extensive requirements of APECS.

Sustainability and trustworthiness are also key elements of the APECS pilot line. Aligned with the goals of the European Green Deal, APECS promotes sustainable technologies, minimizes energy consumption, reduces environmental impact, and improves resource efficiency. Through initiatives such as systemic eco-design and green manufacturing, APECS contributes to Europe's transition to a carbon-neutral and circular economy. In addition, the pilot line plays a crucial role in developing methods to ensure the security and authenticity of chiplets.